Antmicro · Advanced co-simulation with Renode and Verilator: PolarFire SoC and FastVDMA
Co-simulating HDL has been possible in Renode since the 1.7.1 release, but the functionality - critical for hardware/software co-development as well as FPGA use cases - is constantly evolving based on the needs of our customers like Google and Microchip as well as our work in open source groups including CHIPS Alliance and RISC-V International. To quickly recap, by co-simulation we mean a scenario where a part of the system is simulated in Renode but some specific peripheral or subsystem is s...| antmicro.com
