I interviewed Anton Blanchard about his MPW1 application - a 64bit OpenPOWER core written in VHDL. We talked about: VHDL vs Verilog FPGA vs ASIC Problems they faced with such a big design SRAM vs DFFRAM Software vs Hardware mentality Fixing bugs and contributing to OpenLane You can check out the repository here: https://github.com/antonblanchard/microwatt-caravel